High Level Assembler - Extended Mnemonics for BIC instruction

The table below lists all documented extended mnemonics for instruction BIC (Branch Indirect on Condition). Each extended mnemonic links to a text section with some additional info on the pertinent pseudo opcode.

Opcode Assignments.

Remark:
Please note that the creation of descriptions for all individual instructions is an ongoing process. As yet no such descriptions have been created for the opcodes on this page.

Extended Mnemonics for BIC

All instructions in this table are six bytes in length. The first byte always has a value of X'E3', the second byte of the opcode is located in the sixth byte of the instruction and always has a value of X'47'. The second half of the second byte is the mask to be used for determining whether or not to execute the branch. This mask designates the exact pseudo opcode.

Extended Mnemonics for BIC (Branch Indirect on Condition)

E347 0 1 2 3 4 5 6 7 8 9 A B C D E F
    BIO BIH
BIP
  BIL
BIM
    BINE
BINZ
BIE
BIZ
    BINL
BINM
  BINH
BINP
BINO BI

 

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